[ENGN3213 Home]
Department of Engineering
Australian National University
ENGN3213
Digital Systems & Microprocessors
Computer & Hardware Labs
M.R. James
V1.2
Copyright 2002 ANU Engineering
Contents
Introduction
General
Notebooks
Laboratory Objectives
What is expected from you in the Labs and Tuts?
Computer Labs/Tutorials
Hardware Labs
Computer Lab 1 - Introduction to Xilinx
Aim
Preparation
Equipment
Digital Logic Schematics
Xilinx Foundation Projects
Starting Xilinx Foundation
Opening a Xilinx Project
Schematic Editor
Simulating a Digital Circuit
Implementing a Digital Circuit for FPGA
Bit Slice 4-Bit Adder
Creating a New Project
Creating a New Schematic
Simulation of the Full Adder
Hierachical Design
Simulation of the 4-bit Adder
Appendix: Binary Arithmetic
Computer Lab 2 - Introduction to VHDL
Aim
Preparation
Equipment
Digital Circuits and VHDL
A Warning About VHDL
Creating a New VHDL Project
Creating a New VHDL Source File
Pins
Synthesis
Simulation
Implementation
4-bit Adder using Schematics and VHDL
Create a new Schematic Project
Create a Macro Symbol from a VHDL Source File
Creating the Top-Level Schematic
Simulation of the 4-bit Adder
4-bit Adder using only VHDL
Create a new VHDL Project
Add a VHDL Source File for the Full Adder
Creating the Top-Level VHDL Source File
Synthesis
Simulation of the 4-bit Adder
Implementation
Computer Lab 3 - Flip Flops and State Machines: Schematics
Aim
Preparation
Equipment
Pedestrian Crossing Controller
Flip Flops
D Latch
D Flip Flop
JK Flip Flop
Up/Down/Stop Counter
Computer Lab 4 - Flip Flops and State Machines: VHDL
Aim
Preparation
Equipment
JK Flip Flop
Pedestrian Crossing Controller
Structural VHDL
Behavioral VHDL using State Editor
Up/Down/Stop Counter
Computer Lab 5 - Introduction to BSVC 68000 Simulator
Aim
Preparation
Equipment
Introduction
The BSCV 68000 Simulator
Hand Assembly and Running
The 68kasm Assembler
Running a Program on the BSVC
Assembly Code and Directives
Computer Lab 6 - Assembly Language Programming
Aim
Preparation
Equipment
Introduction
Subroutines
Methods for Parameter Passing
Via Registers
Via the Stack
Local Variables and Stack Frames
Nested Subroutines
Computer Lab 7 - Assembly and C Programming
Aim
Preparation
Equipment
Preliminaries
gcc Assembler Syntax and Directives
Assembling and Linking
Scripts and Makefiles
C Programming
A First Example
Scripts and Makefiles
Subroutines
Pointers
Hardware Lab 1 - Combinational Design using Schematics
Aim
Preparation
Equipment
Preliminaries
4-bit ALU Design - PREPARATION
Description
Design Tasks
LABORATORY - Hardware Implementation of the ANDOR Project
Pins
Implementation
Report Files
Programming the Hardware Device
Using the Hardware
Editing and Re-Doing
LABORATORY - Hardware Implementation of the 4-bit ALU Project
Pins
Implementation and Hardware Testing
Hardware Lab 2 - Combinational Design using VHDL
Aim
Preparation
Equipment
4-bit ALU Design using VHDL only - PREPARATION
Description
Design Tasks
LABORATORY - Hardware Implementation of the 4-bit ALU Project
Pins
Implementation and Hardware Testing
Hardware Lab 3 - Counter Design using VHDL
Aim
Preparation
Equipment
Binary/Gray Counter Design
Description
Specification
Design
Laboratory Tasks
Up/Down/Stop Counter
Binary/Gray Counter
Hardware Lab 4 - Counter Design using Schematics
Aim
Preparation
Equipment
Binary/Gray Counter Design
Laboratory Tasks
Hardware Lab 5 - Reaction Timer Design
Aim
Preparation
Equipment
Reaction Timer
Description
Specification
Design
Laboratory Tasks
Hardware Lab 6 - Introduction to Coldfire uP and I/O
Aim
Preparation
Equipment
The Coldfire 5206 Single Board Computer
Getting Started
The dBug Monitor
A First Example
Assembling and Linking
Scripts and Makefiles
Calling a C Function from Assembler
A C Example
Linking Two or More Object Files
Microprocessor Input/Output
Text-based I/O via dBug Monitor
Parallel Port
Timer
Interrupts
A Note on Using GCC Under UNIX
Hardware Lab 7 - Assembly Language I/O
Aim
Preparation
Equipment
LED Flasher - Documented Assembly Language Program
Description
Specification
Laboratory Tasks
Hardware Lab 8 - C Language I/O
Aim
Preparation
Equipment
LED Flasher - Documented C Language Program
Laboratory Tasks
Hardware Lab 9 - Reaction Timer and Serial Communication
Aim
Preparation
Equipment
Introduction
System Design
Serial Communication
Timer
Reaction Timer
Laboratory
Appendix - MCF5206 UART 1 Registers
Appendix - Serial Communication
A Simple One-Way Serial Channel
Oscilloscope Measurements
APPENDIX: The Digital Design and Microprocessor Lab
Overview
Xilinx FPGA
Programmable Devices
Xilinx Demo Board
Digital Trainer Board
Motorola Coldfire SBC Cable
[ENGN3213 Home]
ANU Engineering - ENGN3213
