[ENGN3213 Home]
Department of Engineering
Australian National University
ENGN3213
Digital Systems & Microprocessors
Lecture Notes
Matt James
V1.2
Copyright 2002 ANU Engineering
Contents
Introduction
General
Digital Design
Combinational Logic - Review
Combinational Logic
Digital Gates and Logic
Gate Characteristics
Currents and Voltages
Noise Margin
Fan Out
Propagation Delays
Power
Speed-Power Product
Common TTL and CMOS Logic Gates
TTL
CMOS
Gate Outputs
Open-Collector
Tri-state Gates
Boolean Algebra
Boolean Variables
Boolean Functions
Theorems of Boolean Algebra
De Morgan's Laws in Terms of Gates
Boolean Functions and Digital Circuits
Universality of NAND and NOR
Asserted Levels
Alternative Logic Gate Representations
Canonical Forms
Simplification and Implementation of Boolean Functions
Direct Implementation
Karnaugh Maps (K-Maps)
Entered-Variable K-Maps
Computer Methods
Hazards
Standard MSI Combinational Components
Decoders and Encoders
Multiplexers and Demultiplexers
Other
Flip Flops and Related Devices
Flip Flops
Counters
Combinational Logic and VHDL
VHDL
Structure of a VHDL File
Signals, Variables and Constants
Data Types
Processes; Sequential and Concurrent Statements
Expressions, Flow Control
Functions, Procedures, Packages and Libraries
IEEE 1164 Library
Structural and Behavioral Examples
Design Flow: Entry, Simulation and Implementation
Sequential Systems
What is a Sequential State Machine? Examples
Examples on the ENGN3213 Web Page
Diagrams
Formal Definition of Finite State Machines
State Tables and Diagrams
Next State/Output Table
State Diagram
Timing Diagrams
Sequential Machines in VHDL
Latches and Flip Flops
The SR Latch
Race Conditions
The Gated D Latch
The D Flip Flop
Timing and Metastability
Triggering
Types of Latches and Flip Flops
Design of Sequential Systems
Synthesis of Sequential Machines
Canonical Implementation
Design Steps
High Level Representations and Binary Coding
Example - Up/Down/Stop Counter
Example - Vending Machine Controller
Practical Aspects of Sequential Machine Design
Asynchronous Inputs
Switch Debouncing
Initialisation and Reset
Example - Pedestrian Crossing Controller
Equivalence and Redundancy
Registers and Counters
Registers
Counters
Using VHDL for State Machine Design
Register-Transfer Logic (RTL) Systems
RTL Systems
Execution Graphs
Implementation
Data Subsystem
Control Subsystem
Microprogrammed Controller
Microcomputer Systems - Introduction
Microcomputer Organisation and SBC Introduction
Bus Sizing
Instruction Sets and Programming
Programmer's Model
Notation
68000 Chip
5206 Chip
Assembly Example
Stacks
Microcomputer Systems - Introduction
Addressing Modes
Immediate
Absolute
Register Direct
Address Register Indirect
Address Register Indirect with Postincrement
Address Register Indirect with Predecrement
Register Indirect with Displacement
Register Indirect with Index
Program Counter Relative
Instruction Set
Examples
CCR
Data Movement
Integer Arithmetic
Logical Operations
Shift Operations
Bit Manipulation
Program Control
Manuals
Position Independent Code
Subroutines
Subroutine Operation
Parameter Passing
Local Variables and Stack Frames
C Programming
Local Variables and Stack Frames
Pointers
I/O Programming
I/O Interfaces, Modules, and Exceptions
Text
Parallel Port
Timer
Polling
Interrupts and Exceptions
Serial Port
Memory Devices, Buses, Bus Timing
Bus Interfaces
ROM
Programmable Logic Devices
RAM
Address Decoding
Register Files
68000 Bus Timing
Index
[ENGN3213 Home]
ANU Engineering - ENGN3213
