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Consider the output of one gate connected to the input of
another gate. It is important to understand the allowable
ranges of voltages at gate outputs and inputs, and the currents
that can flow between gates.
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VIH(min) The minimum voltage level at the input to be recognised as H.
-
VIL(max) The maximum voltage level at the input to be recognised as L.
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VOH(min) The minimum voltage at the output when in state H.
-
VOL(max) The maximum voltage at the output when in state L.
Thus any voltage greater than
VIH(min) applied to an input will be interpreted
as H, and any voltage less than
VIL(max) will be interpreted as L.
For unambiguous communication of logic level from one gate to another we need
|
(1) |
The currents are
-
IIH The current flowing into the input when a specified H voltage is applied.
-
IIL The current flowing into the input when a specified L voltage is applied.
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IOH The current flowing out of the output when in state H.
-
IOL The current flowing out of the output when in state L.
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ANU Engineering - ENGN3213