Open-Collector

TTL gates with open-collector output stages have eliminated R₃, Q₃ and the diode, Figure 7. The collector of Q₄ is connected only to the output Y. In order for open-collector TTL gates to work, an external pull-up resistor must be provided (of the order 10 k $\Omega$ ).

**Figure 7:** TTL NAND gate with OPEN COLLECTOR output.
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Open-collector TTL gates can be tied together, forming a wired-AND connection, Figure 8. The value at Y is the logical AND of the outputs Y₁ and Y₂.

**Figure 8:** Wired-AND connection of open collector TTL gates showing external pull-up resistor.
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