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There are many practical issues which must be taken into
account when designing state machines. These include:
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Asynchronous inputs. These are inputs which can arrive at
any time, and are not synchronised to the clock signal.
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metastability, improper detection of signal
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pulse catching, stetching and synchronisation
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state selection
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switch debouncing
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Output glitches. Due mainly to
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hazards in output logic
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race conditions
May not be a problem, but if so, then
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State code assignment. Careful selection of states and state code
can minimise circuitry and reduce problems associated with glitches
and asynchronous inputs.
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States having the same next state for a given input condition should
have logically adjacent state code assignments.
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States that are next states of a single state should have
logically adjacent state code assignments.
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Reset and initialization. On power up, you cannot predict
the state a flip flop will go into. A circuit, sometimes
called a sanity circuit, is used to force the
flip flops into a known or specified state. This is often done
using PRESET or PRECLEAR (or other) features of the flip flops.
We will look further into some of these points in the following
sections.
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