next up previous contents index

[ENGN3213 Home]

The D Flip Flop

      We want a FF that responds to a clock edge, either rising or falling. One design is the master-slave type, Figure 62.

 


  
Figure 62: Master-slave D FF circuit.
\begin{figure}
\begin{center}
\epsfig{file=images/seqimg11.eps}\end{center}\end{figure}

This circuit is designed to respond to the falling edge, Figure 63 (propagation delays shown).


  
Figure 63: Master-slave D FF waveform.
\begin{figure}
\begin{center}
\epsfig{file=images/seqimg12.eps}\end{center}\end{figure}

The standard circuit symbols for the rising and falling edge triggered D flip flops are shown in Figure 64.


  
Figure 64: D FF symbols.
\begin{figure}
\begin{center}
\epsfig{file=images/seqimg13.eps}\end{center}\end{figure}

Reading: Wakerly, Sections 7.1 and 7.2 (pp531).


next up previous contents index

[ENGN3213 Home]

ANU Engineering - ENGN3213