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The simplest way to bias a D MOSFET is to use the zero bias
network of Figure 134.
This is reasonable since vGS can be positive and negative.
Figure 134:
n-channel D FET bias.
![\begin{figure}
\begin{center}
\epsfig{file=images/fetimg17.eps}\end{center}\end{figure}](fetimg54.gif) |
We have
and so
ID = IDSS, and
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