Digital Circuits and VHDL

Since the 1980s Hardware Description Languages (HDLs) have been created to ease the process of digital system description, design, simulation, testing and implementation. In this course we will be using one such language, VHDL. We will describe our digital circuits in VHDL, simulate our designs, and compile our designs for hardware implementation in Xilinx Field Programmable Gate Arrays (FPGA), a type of programmable digital device.

To get a quick feel for VHDL, consider the digital circuit of Figure 1 (from CLAB1). This circuit represents the Boolean function

X = AB + C

and can be viewed in input-output terms as shown in Figure 2.

In VHDL, this circuit can be represented by a signal assignment statement

X <= (A and B) or C

The symbol <= is the assignment operator, VHDL code for digital systems may consist of a set of statements within an architecture declaration, together with a specification of external interfaces via ports, listing signals that are to be inputs or outputs, in an entity declaration. As we shall see, VHDL is capable of specifying digital circuits at many levels of abstraction; the VHDL code above is behavioral or dataflow. A complete VHDL file for this circuit is as follows:

library IEEE;
use IEEE.std_logic_1164.all;

entity andorv is
    port (
        A: in STD_LOGIC;
        B: in STD_LOGIC;
        C: in STD_LOGIC;
        X: out STD_LOGIC
    );
end andorv;

architecture andorv_arch of andorv is
begin
  X <= (A and B) or C;
end andorv_arch;

In this VHDL file, note:

The entity and architecture specifications, and how they specify the inputs and outputs, and the combinational logic, respectively.
The signals are declared as STD-LOGIC, a type we will always be using which comes from the IEEE Standard 1164.

See the textbook and lecture notes for a more complete description of VHDL. In this lab you will learn something about VHDL by studying the examples given and writing your own code.

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