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Hazards

A glitch  is an unwanted short duration pulse. Such pulses can cause circuit malfunction, and so they are hazards.  

In combinational circuits, hazards are not so critical, but in sequential circuits glitches can initiate unwanted actions.

The following two types of hazards commonly occur in combinational circuits:

• Static Hazards.   When two complementary signals (e.g. A, $\overline{A}$) become equal for a short time.
• Dynamic Hazards.   When two signals that should always have the same value become unequal for a short time.

Hazards are caused by asymmetries in signal paths with different propagation delays.

As an example of a static hazard, consider the combinational logic circuit of Figure 170 for a function F.

  

Figure 170: Circuit with static hazard.

The K-map is shown in Figure 171.

  

Figure 171: K-map for F.

Now $F=X\overline{Y} + YZ$. Let's set X=Z=1. Then we have $F= 1\cdot \overline{Y} + Y \cdot 1 = 1$, for any value of Y ideally. Now consider a transition for Y from 1 to 0 - this will produce a glitch in F, because there will be a short time during which a=b=0 (these should be complementary). This is illustrated in Figure 172.

  

Figure 172: Static hazard.

This hazard can be removed with the aid of a hazard cover.   This is achieved by doing an extra loop in the K-map which overlaps the existing loops in Figure 171; this is shown in Figure 173.

  

Figure 173: K-map for F with hazard cover.

Algebraically, we are expressing F in the non-minimal form

$$F=X\overline{Y} + YZ + XZ$$

where XZ is the extra term corresponding to the hazard cover. This term is redundant logically, but has the effect of removing the glitch.

Exercise. Draw the hazard-free circuit and verify that the hazard has been removed. Simulate in PSPICE. Use the PSPICE file shaz.sch.

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