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DC Bias Analysis

For the DC bias analysis, the capacitors are all open circuits, and so we need only consider the network consisting of R_B1, R_B2, R_C, R_E and the transistor. This is just the voltage divider network of Figure 109, and can be analysed by the methods of Section 8.4.

The first step is to replace the voltage divider V_CC, R_B1, R_B2 by its Thevenin equivalent, which will be V_BB in series with R_B, as in Figure 107. Now

$$R_B = R_{B1} \parallel R_{B2} = 12.29 \ k \Omega$$

and

$$V_{BB} = \frac{V_{CC}R_{B2}}{R_{B1} + R_{B2}} = 4.52 \ V .$$

Also V_BE=0.7 V and $I_C = \beta I_B$.

Next,

V_BB = I_B R_B + V_CE + I_E R_E

and $I_E = (\beta + 1) I_B$, so that

$$I_B = \frac{V_{BB} - V_{BE}}{R_B + (\beta + 1) R_E} = 12.2 \ \mu A$$

and I_C = 3.66 mA $\approx I_E$. This gives

$$V_{CE} = V_{CC} - I_C (R_C + R_E) = 13.3 \ V .$$

Thus the DC operating point Q is I_C = 3.66 mA, V_CE=13.3 V, and the active mode assumption is OK.

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