An important part of amplifier design is setting the DC bias point Q. In this section we look at a general bias network, Figure 107.
Applying KVL to the left loop gives
The right hand loop gives, using KVL,
The operating point Q=QDC is determined from the load line and the collector characteristic curves, or via . Notice that in this analysis we have made (implicit) use of the DC model.
Example. Find the DC operating point for the voltage divider bias network shown in Figure 109. Use , , , VCC=20 V, VBE=0.7 V, RE=0, and . Note that RE=0 in this example.
To solve this problem, we first replace the voltage divider VCC, RB1, RB2 by its Thevenin
equivalent, which will be VBB in series with RB, as in Figure 107.
Now
Note that absence of RE makes IB critically dependent on exact VBE. Using an emitter resistor RE improves the bias stability, meaning robustness of the bias point with respect to parameter variations.
ANU Engineering - ENGN2211