CMOS INVERTER

Load the PSPICE file cmos-inv.sch, Figure 50.

**Figure 50:** CMOS inverter circuit.
$\begin{figure} \begin{center} \epsfig{file=images/clab8img3.eps}\end{center}\end{figure}$

Simulate the circuit and obtain the INVERTER input-output curve of Figure 51. Explain, as best you can, what happens as V_in is increased from 0 V to V_DD=5 V.

**Figure 51:** CMOS inverter input-output curve.
$\begin{figure} \begin{center} \epsfig{file=images/clab8img4.eps}\end{center}\end{figure}$

For V_in=0 V (i.e. LOW), work out the state or mode of operation for each transistor (on or off is OK), and deduce that V_out should be HIGH (value?)
Do the same for V_in=5 V (i.e. HIGH), and this time deduce that V_out should be LOW (value?)
To do this, examine transistor currents and voltages.

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