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DC Bias

Load the PSPICE file bjt-dc3.sch, Figure 35. This circuit will have the same DC bias as the amplifier circuit of section 7.5.

Lecture Notes : BJT Transistor Circuits : DC Bias

  

Figure 35: Circuit for BJT DC operating point.

Exercise:

1.

Simulate the circuit for the given setup. Is the transistor Q₁ in the active mode? Why?

It may be helpful to refer to the transistor characteritics obtained earlier (it is the same transistor).

2.

We now wish to investigate the effect of varying the emitter resistor R_E on the DC operating point, and in particular on I_C and V_CE. We do this using DC sweep, with R_E set up as a parameter, varying between 100 $\Omega$ and 5 k$\Omega$.

Enable DC sweep and simulate again. Obtain plots of I_C and V_CE vs R_E, (something like Figure 36). (Recall that V_CE=V_C-V_E!)

3.

Explain what you see.

Note carefully the effect of R_E on I_C and V_CE.

4.

Draw load lines on the characteristic graphs (I_C vs V_CE) for three values of R_E: 0.5, 1.0 and 3.0 k$\Omega$.

The horizontal intercept is V_CC=5 V, and the vertical intercepts are given by

$$I_{C(sat)} = \frac{V_{CC}}{R_C+R_E}$$

Plot the operating point Q corresponding to item 1 (on the R_E=3 k$\Omega$ load line).

  

Figure 36: DC operating point varies with R_E.

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