|
PAT. NO. |
|
Title |
1 |
5,933,516 |
 |
Fingerprint
matching by estimation of a maximum clique |
2 |
5,903,664 |
 |
Fast
segmentation of cardiac images |
3 |
5,669,382 |
 |
System
for measuring myocardium in cardiac images |
4 |
5,559,334 |
 |
Epipolar
reconstruction of 3D structures |
5 |
5,550,376 |
 |
Method
of calibration of imaging devices |
6 |
5,544,254 |
 |
Classifying
and sorting crystalline objects |
7 |
5,436,829 |
 |
Method
of achieving reduced dose X-ray fluoroscopy by employing transform-based
estimation of Poisson noise |
8 |
5,396,531 |
 |
Method
of achieving reduced dose X-ray fluoroscopy by employing statistical
estimation of poisson noise |
9 |
5,361,307 |
 |
Correlation
methods of identifying defects in imaging devices |
10 |
5,325,198 |
 |
Unitary
transform methods of identifying defects in imaging devices |
11 |
5,317,755 |
 |
Systolic
array processors for reducing under-utilization of original design
parallel-bit processors with digit-serial processors by using maximum
common divisor of latency around the loop connection |
12 |
5,293,415 |
 |
X-ray
fluoroscopy system for reducing dosage employing iterative power ratio
estimation |
13 |
5,291,431 |
 |
Array
multiplier adapted for tiled layout by silicon compiler |
14 |
5,187,754 |
 |
Forming,
with the aid of an overview image, a composite image from a mosaic of
images |
15 |
5,177,691 |
 |
Measuring
velocity of a target by Doppler shift, using improvements in calculating
discrete Fourier transform |
16 |
5,175,843 |
 |
Computer-aided
design method for restructuring computational networks to minimize
shimming delays |
17 |
5,164,724 |
 |
Data
format converters for use with digit-serial signals |
18 |
5,159,598 |
 |
Buffer
integrated circuit providing testing interface |
19 |
5,119,378 |
 |
Testing
of integrated circuits including internal test circuitry and using token
passing to select testing ports |
20 |
5,115,437 |
 |
Internal
test circuitry for integrated circuits using token passing to select
testing ports |
21 |
5,084,834 |
 |
Digit-serial
linear combining apparatus |
22 |
5,034,909 |
 |
Digit-serial
recursive filters |
23 |
5,034,908 |
 |
Digit-serial
transversal filters |
24 |
5,025,257 |
 |
Increased
performance of digital integrated circuits by processing with
multiple-bit-width digits |
25 |
5,016,011 |
 |
Increased
performance of digital integrated circuits by processing with
multiple-bit-width digits |
26 |
5,010,511 |
 |
Digit-serial
linear combining apparatus useful in dividers |
27 |
4,985,834 |
 |
System
and method employing pipelined parallel circuit architecture for
displaying surface structures of the interior region of a solid body
|
28 |
4,972,358 |
 |
Computation
of discrete fourier transform using recursive techniques |
29 |
4,951,221 |
 |
Cell
stack for variable digit width serial architecture |
30 |
4,942,396 |
 |
To-digit-serial
converters for systems processing data in digit-serial format |
31 |
4,939,687 |
 |
Serial-parallel
multipliers using serial as well as parallel addition of partial products
|
32 |
4,910,700 |
 |
Bit-sliced
digit-serial multiplier |
33 |
4,905,175 |
 |
Digit-serial
shifters constructed from basic cells |
34 |
4,860,240 |
 |
Low-latency
two's complement bit-serial multiplier |