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Computer Lab 2 - Introduction to VHDL
Aim
Preparation
Equipment
Digital Circuits and VHDL
A Warning About VHDL
Creating a New VHDL Project
Creating a New VHDL Source File
Pins
Synthesis
Simulation
Implementation
4-bit Adder using Schematics and VHDL
Create a new Schematic Project
Create a Macro Symbol from a VHDL Source File
Creating the Top-Level Schematic
Simulation of the 4-bit Adder
4-bit Adder using only VHDL
Create a new VHDL Project
Add a VHDL Source File for the Full Adder
Creating the Top-Level VHDL Source File
Synthesis
Simulation of the 4-bit Adder
Implementation
ANU Engineering - ENGN3213
